The present invention relates to a semiconductor processing system such as a card type electronic device represented by a flash memory card conforming to the standard of the ATA (AT Attachment) card or CF (Compact Flash) card, more particularly to a technique usable effectively for preventing data damages to be caused by ejection of the semiconductor processing system undesirably or for enabling data recovery during an operation.
A pulled-down terminal in an ATA card and a pulled-up terminal in a card slot that correspond to each other are usually used to detect whether or not the ATA card is inserted/ejected in/from its card slot. If an ATA card is inserted in the card slot and the corresponding terminals are connected to each other, the terminal in the card slot is grounded, then an interface circuit in the card slot, which monitors the terminal, detects the inserted card, thereby beginning supply of an operation power to the card. When the card is ejected, the corresponding terminals are disconnected, then the interface circuit in the card slot detects the supply voltage at the terminal in the card slot, thereby detecting the ejection of the card. The interface circuit in the card slot, when detecting such card ejection, stops the operation power supply to the card (refer to the patent document 1).
[Patent Document 1]
Japanese Unexamined Patent Publication 2000-99215 (FIG. 5)
However, the above conventional technique does not consider the problem that might occur in the card due to the stop of the power supply when the card is ejected. According to an examination by the inventor of the present invention, if a flash memory card is ejected from the card slot during a write operation, the operation power supply to the card stops and the supply voltage drops. And, if data is kept written in the memory in such a state, the memory might be affected adversely by the write operation. For example, if the operation power supply stops just after an erasure operation is performed just before a write operation in non-volatile memories, some of the non-volatile memory cells might be left over as over-erased ones. An over-erased memory cell means a memory cell in which the threshold voltage is changed over a predetermined threshold voltage range, although the threshold voltage of the erased memory cell should be included in the range. For example, if the erasure state threshold voltage range is set at the low voltage side, the threshold voltage of the memory cell becomes lower than the threshold voltage range and comes to have a negative voltage. In a memory cell of which threshold voltage is negative, the memory cell is turned on even when a non-selection voltage (ex., 0V) is applied to its word line, thereby a current flows in the channel. If such an over-erased memory cell is turned on normally, another memory cell that shares a bit line with the over-erased memory cell comes to malfunction. To prevent such a problem, some countermeasures are taken as follows, for example. It is avoided to leave such over-erased memory cells over, recovery and relief processings are prepared for generation of over-erased memory cells, or a circuit that might malfunction is permitted to be isolated when it malfunctions.
In order to enable the above countermeasures, the following measures are also effective; (1) preparing a spare battery, (2) using a large capacity capacitor, (3) dualizing the data area, and (4) cautioning the user fully about the trouble occurrence. In (1), however, a small card cannot have space for such a spare battery. If the card has such space, the card cost increases. The large capacity capacitor in (2) also has the same problem as that of (1). In (3), the data management method becomes complicated. In (4), it is impossible to caution every user fully about the problem occurrence.
Under such circumstances, it is an object of the present invention to provide a semiconductor processing system represented by a card type electronic device, which can solve easily the above conventional problem caused by power shutoff that occurs when the card is ejected.
It is another object of the present invention to provide a semiconductor processing system represented by a card type electronic device capable of taking countermeasures in accordance with the subject memory/data management method with respect to a problem caused by power shutoff that occurs when the card is ejected.
These and other objects, as well as novel features of the present invention will become more apparent by referring to the following description and appended drawings.